Nixie HV Switching PSU

Nixie HV Switching PSU

• Introduction
• Why a Switch-Mode Design?
• The Design
• Performance Results
• High Current Experiments
• Parts List (Bill of Materials)

It's been a while since this page was originally written - in that time, RoHS has come in and some parts I originally specified have been discontinued. I've now modified some of the components to use compatible parts which should be reasonably widely available. If you have any problems, please let me know. Many, many, 100s of these boards have been made and are operating reliably and efficiently - they are used in nixies clocks, neon banner displays, tube stomp boxes, headphone amplifiers and tube radios - probably in many other devices too!

Note: The Eagle files accessed via the sidebar on this page have been updated to work with the latest versions of Eagle, including the MAC ones. There have also been some minor changes to the layout - however, some of the photos on this page have not yet been updated - this is of no consequence and does affect the relevance of any associated text.

Introduction

This particular project sprang from my fondness for nixies, a type of cold-cathode discharge display tube popular in the 1960's and 1970's, before they were effectively killed off by LEDs. There is a very active Google group called NEONIXIE-L which I can strongly recommend for those interested in these fascinating devices - see the left sidebar for more information

Nixies require a 170V to 250V DC power supply at between 10mA and 50mA - each tube actually only takes part of that, but certain types of tube take more than others, and, whatever people say, size matters - the bigger the tube, generally the more current it takes. Also, nixies tend to be used in multiples of two, normally these days for clocks. So, 4 tubes for a normal clock, 6 for something more elaborate... (hh:mm:ss etc.).

It was mentioned to me that this design could be appropriate for a number of low-current valve projects, as it happily provides a good, low-noise DC supply at high efficiency from a very small board with an input between 12V and 15V DC.

The core of this design is about 4cm x 3cm - using the main layout you can transport the PSU onto your own PCB with little effort,

Why a Switch-Mode Design?

It is probably beyond the scope of this simple document to describe the operation of switch-mode power supplies (SMPSs) - suffice to say the technique relies on the voltage pulse you get from rapidly collapsing the magnetic field in an inductor. This is done many thousands of times a second and the output pulses are collected and smoothed. Whilst this sounds simple, in practice it is complex to do well - there are a number of key design decisions that have to be made, and board layout is critical - SMPSs will not work well when built on Vero/StripBoard or prototyping plug-in boards - in fact, they may not work at all!

So, if SMPSs are tricky to work with, why use them? Simple - when they work they are brilliant! They are very small, cheap, completely solid-state, run cool and can be 90% or more efficient. This last point, efficiency, can be very important. SMPSs can lower a voltage (a "buck" converter) or increase the input voltage (a "boost" converter).

Suppose you wanted to drop a 9V supply to provide 5V @ 1A. If you used a linear voltage regulator, such as a 7805, you would be dropping 4V @ 1A in the regulator, i.e. dissipating 4W making it only 56% efficient (9W in, 5W out).

An SMPS buck converter doing the same job would typically be 90% efficient, so with a 5W output you would only have 5.6W in, i.e. about 0.6A in or only 2/3rds of the input current requirement of the linear regulator, not to mention only dissipating 0.6W - 6.7 times less than the linear "equivalent".

For boost converters, there is no easy linear equivalent - SMPSs are really the only choice unless you use a special transformer or an inverter, both of which are large - inverters tend to be complex and inefficient. The design given here will run at 88% efficiency when using the recommended layout and components. If you use another PCB layout, please, please read the notes about layout carefully - they really are important. The layout I use is the result of very careful experimentation and experience - you change the design, your results will be different - I guarantee it!

The Design

For this type of SMPS, there are a few chips that can be used. Manufactures include MAXIM (MAX771, MAX1771), On Semiconductor (MC34063) and others. My preferred chip is the MAX1771, a replacement for the deprecated MAX771. This chip uses a funky pulse-width modulation (PWM) scheme to get high efficiency in a variety of configurations, and has the added benefit of in-built current limiting.

The circuit diagram may look similar to the examples in the MAX1771 datasheet - it is! However, for a configuration like this, where the step-up is large, what becomes absolutely critical is component choice and board layout.

Click on the above schematic to see it full size and read the notes. The source for the project is all in Eagle and available from the link on the sidebar.

The key points are:

• Select the FET for low RDS_on, Q_g and C_oss. The FET I now use, a Vishay IRF644PBF, is a good choice as its not too exotic, is reasonably priced, and performs very well in this configuration with an RDS_on of 0R28 and Q_g of 69nC. An IRF740A (note the "A") will work but is more lossy.
• D1 needs to have a very fast M_ttr, typically < 50nS, but lower if possible. The device I chose, the Vishay ES2F has an M_ttr of 35nS.
• The trace between the MAX 1771 and the FET needs to be short and FAT, i.e. be low resistance and inductance. This allows the gate charge to be given to the FET in the shortest possible time; the speed the FET switches at directly effects efficiency.
• R2, the "top" end of the voltage feedback network, has almost the full output voltage across it. This point is often missed - most resistors are rated at 50V - run them at much above that for some time, and they will break down, so its important to use a 220V+ rated component.
• The FB pin is very sensitive to stray EMI - the voltage feedback network should be kept away from high current paths and the connection to the FB pin should be as short as possible. Should your implementation appear to not regulate or not to be adjustable, use a 'scope to have a look at the FB pin (3) - if you see spikes, then that may well be the reason. Putting a suppression capacitor from pin 3 to ground is not a solution - the layout must be correct.
• C1 & C5 should be low ESR types. This is important as they must provide high current very quickly - C1 provides up to a 2A surge into the inductor, and C5 the gate charge current for the FET.
• C2 & C5 should be close to the MAX 1771. This again is so that they can deliver the gate charge to the FET without interference from resistance or inductance in the PCB traces.
• C4, the output smoothing capacitor, must be low ESR, typically < 3 Ω. If a normal, high ESR capacitor is used then the regulator will have problems maintaining the output voltage under load. There are few choices available for high-voltage SMD aluminium electrolytics, but the Panasonic type V series EB are ok, e.g. EEV-EB2E100Q
• For 50mA+ output, L1 should be DC rated at about 2A. The chosen inductor, an EPCOS B82479, fits this bill and works very well in this circuit. If you use a shielded inductor, you will get less RFI, but the efficiency will also drop by about 3%. Small surface mount, high current, shielded inductors are not common! You could try a Sumida CDRH127-101 which works ok even though it starts to saturate at about 1.7A.
• For lower output currents up to 25mA, you can use a 1A inductor and change R_sense to 0R100 Ω. A good inductor here would be a Sumida CDRH125-101. Select an inductor with a low DC resistance as straight resistive losses will effect efficiency and lead to heating.
• It is sometimes a good idea to place an RF ferrite bead round the gate to the FET if you find that your circuit shows a tendency to be sensitive to the presence of a finger etc. e.g. when you move your hand near, you hear a whistle from the inductor or the output voltage varies.

You can see the shadow of the ground plane on the underside and note that several vias in parallel have been used to connect R_sense to the ground plane - each via can typically handle a few 100 mA, and as up to 2A can flow through R_sense we need to provide a good low impedance path to ground. Note that there are no signal tracks on the bottom, thus the ground plane is un-interrupted.

Also, note the shortness of the gate trace to T1, the wide, low impedance main power traces and the lack of any loops that would lead to inductance losses. The tank capacitors are all close to the chip, as is the feedback adjustment. Stability is ensured by sensible layout.

The lack of a ground plane under the inductor prevents energy loss due to induced currents in the ground plane. If you look at the top and bottom masks superimposed you will see that there is a clear area under the inductor and that we effectively have a "star" ground with no loops.

Performance Results

The performance results are available as a PDF file, but are repeated here. Testing was done using non-inductive high-power resistors. Rather than rely on the values printed, each was measured using a good DMM (Tektronix DMM 916). For each test, the input current and voltage was measured together with the output voltage. This gives us both the input and output power, and thus the efficiency.

Measurements were made after allowing each test setup to run for several minutes. At no time did any component get hot - the FET was always cool to the touch, and the inductor warmed up only under heavy loads, but never got hot.

¹Experiment 7 used a shielded CDRH127-101 inductor rather than the default unshielded one. Note the efficiency drop vs. exp. 6

²Experiment 8 used a connection variation where the -ve end of C4 is connected to the CS input of the MAX1771 (pin 8, top end of the CS resistor, R_sense) rather than directly to ground. This mode of operation is discussed in the Maxim Application Note, #1054, "Simple Change Improves PFM Boost-Controller Efficiency". As can be seen from these simple tests, in this rather extreme configuration, the change had no practicable effect on the efficiency of the circuit. Note that this test was not done on the original test PCB and there may well be subtle variations in the performance of individual boards. At best, when the original tests were repeated on the new board, an improvement of perhaps 0.25% could be seen, however this probably lies within the limits of experimental error and should be ignored.

• Ouput ripple was typically between 1% and 1.4%
• Switcher rate was approximately 62kHz
• If the default inductor (Epcos B82479-A1-104M) is replaced with a Sumida CDRH127-101 shielded inductor, then the overall efficiency drops by about 2% to 3%, but the level of radiated noise decreases. If RFI is a problem for you, this may be worth trying.

High Current Experiments

Some of the larger nixies, like the Rodan CD-47, require currents in the order of 25mA per tube. Experiments were carried out with using the same board layout as before, but using a higher current inductor, a higher current limit, and a FET that was selected for very low RDS_on. All other components remained as before, including the diode.

The choice of FET was important, as the original FET chosen (IRFB9N30A) has an RDS_on of 0R45Ω which can lead to losses of several Watts in a high current design when the FET spends a lot of its time on and conducting large currents. In the original low current design this was less of an issue as a trade-off was made between absolute performance and the cost of the FET. The new Fuji Electric FET, 2SK3772-01 is far more expensive because of its extraordinarily good characteristics for a small TO220 package - normally, to get a low RDS_on you need a bigger die which means a bigger package (e.g. TO247) which in turn means a higher price - many of the true "exotic" FETs cost USD 15 or more

I have two other "exotic" FETs to try, both in TO247 cases: APT30M85BVFR (Farnell 382-9790) and IXYS IXFH40N30 (Farnell 305-2576, DigiKey IXFH40N30-ND) - both have RDS_on values of 0R085Ω, but they are very expensive.

• R_sense changed to 0R025Ω (4A current limit)
• L1 changed to Newport Components 1400-series 47uH, 8.3A, 0R019Ω inductor. p/n 14.473.83 (Farnell p/n 482-572). The JW Miller 2200-series p/n 2209-H would probably be ok (DigiKey M9796-ND)
• T1 changed to Fuji Electric 2SK3772-01, RDS_on 0R130Ω, Q_g 44.5nC, V_ds 300V (Farnell p/n 120-8659)

What can be seen from these results is that with a small change in component values allowing the use of a bigger inductor and a less lossy FET, we can make the SMPS produce 120+mA with no real problems.

I still have to try the other two (larger) FETS.

Bill of Materials

The following parts list has Farnell part numbers as I live in the UK, but most parts should be available from DigiKey or equivalent suppliers. The MAX 1771 is available as a sample from MAXIM if you are lucky!

Note that the DigiKey part numbers are not always the same component, but they represent a good compromise that is available from that supplier.